-- File: full_add.ads
-- Author: Sy Wong
-- Date: 7/98
-- Aim: Implements a one bit adder 

with HDL;
package FULL_ADD is
  type device is
  record
    carry_in, input1, input2: HDL.input:= FALSE;
    sum, carry_out: HDL.output:= TRUE;
  end record;
  procedure update(d: in out device);
end FULL_ADD;