-- File: ripadd.ads
-- Author: Sy Wong
-- Date: 7/98
-- Aim: Implements a one bit adder 

with HDL, 
     FULL_ADD;
package body RIPADD is
  procedure update (d: in out device) is
    u: array (0..n-1) of full_add.device;
  begin
    u(0).carry_in:= d.carry_in;
    u(0).input1:= d.inline1(0);
    u(0).input2:= d.inline2(0);
    -- this is equivalent to hooking up inputs
    FULL_ADD.update(u(0));
    -- update n-1th bit and connect to outputs
    d.sum(0):= u(0).sum;
    for i in 1..N-2
    loop
      u(i).carry_in:= u(i-1).carry_out;
      u(i).input1:= d.inline1(i);
      u(i).input2:= d.inline2(i);
      FULL_ADD.update(u(i));
      d.sum(i):= u(i).sum;
    end loop;
 
    u(N-1).carry_in:= u(N-2).carry_out;
    u(N-1).input1:= d.inline1(N-1);
    u(N-1).input2:= d.inline2(N-1);
    FULL_ADD.update(u(N-1));
    d.sum(N-1):= u(N-1).sum;
    d.carry_out:= u(n-1).carry_out;
  end update;
end RIPADD;